The current high-growth nature of digital communications demands higher speed serial communication circuits. Present day technologies barely manage to keep up with the present need to communicate at high speeds, e.g. gigabit, terabit, and higher transmission speeds. Multiplexers are often used but have different input and output rates, which can cause jitter in the output signal. This invention provides a multiplexer that is symmetric in that substantially the same delay is experienced from any input of the multiplexer to any multiplexer output, thus reducing jitter and resulting in an improved signal.