This technology relates to a process for creating electrodes in which high-surface area nanostructures are fabricated in situ by electrochemically etching a sacrificial scaffold material. Removing a material after it has been built into the cell opens up pores within the electrode whose size and density can be controlled, resulting in higher efficiency and Pt utilization.

Isolating individual components of nanoscale architectures comprised of thin films or nanostructures, without significantly impacting their functionalities, is a critical challenge in micro- and nano-scale device fabrication. One example that illustrates this challenge is seen in Cu interconnect structures for nanometer devices. These devices use interfacial barrier nanolayers to isolate copper layers from dielectric layers.

This invention is directed to a novel non-destructive method to remove excess layers of copper from microchip interconnect-metallization processing, allowing copper to be used in place of aluminum. The new method, an Electro-Chemical Planarization process, is a means of removing the copper in an electrolysis-designed solution bath without damaging the thin-film and interconnect surfaces. The process addresses the damages incurred by conventional CMP allowing for electron-migration into the insulative film layers leading to the eventual short-circuiting within the microchip devices.