This technology relates to a wireless radio communications scheme that minimizes interferences between different channels and increases high bandwidth data communication. Furthermore, this modulation scheme is easy to implement with simple low cost electronic systems. Possible applications for this technology include: optical communication, energy efficient illumination, optical signal processing, smart shower heads, fertilizer dispensers, hydroponics systems, smart automobile brakes, adaptive lighting systems, medical diagnostic systems, etc.

To implement hybrid nanodevices consisting of nanowire crossbars on top of a CMOS backplane, the challenge is to interface between the relatively coarse features of the CMOS domain and the dense nanowires above. Such an interface can be realised through a microwire to nanowire demultiplexer. This technology provides a hybrid demultiplexer architecture that combines both resistor and field effect transistor (FET) devices.

An edge illuminated photovoltaic device is a photovoltaic device in which light illuminates a p-n junction through the edge of the device (i.e. in the direction substantially non-parallel) to the direction defined by the devices electrical contacts to the outer surface. While these devices are advantageous, they are yet to achieve the high efficiency and low cost required for commerical viability. This invention relates to the fabrication of horizontally stacked, p-n junction type semiconductor devices for photovoltaic energy conversion via edge illumination.

Semiconductor nanoparticles (also called quantum dots or nanocrystals) are generally used a lasing medium in a laser, as fluorescent tags in biological testing methods, and as electronics devices. However, these nanoparticles traditionally have high production costs and the methods used for synthesis are extremely toxic at high temperatures, posing safety risks during mass production. Additionally, it has been difficult to form nanoparticles of uniform size. This invention is directed to semiconductor nanoparticles having an elementally passivated surface.

The current high-growth nature of digital communications demands higher speed serial communication circuits. Present day technologies barely manage to keep up with the present need to communicate at high speeds (e.g., gigabit, terabit, and higher transmission speeds). New techniques are needed to ensure that methods for serial communication can continue to expand and grow. A novel approach to high-frequency communications demands on serial communications circuits has been invented.

The current high-growth nature of digital communications demands higher speed serial communication circuits. Present day technologies barely manage to keep up with the present need to communicate at high speeds, e.g. gigabit, terabit, and higher transmission speeds. Multiplexers are often used but have different input and output rates, which can cause jitter in the output signal.

Advances in the semiconductor industry continue to be desired to address demand for semiconductor devices capable of high performance and low power consumption in a wide variety of applications. In one or more applications, enhanced high-voltage semiconductor devices such as, enhanced Schottky diodes, p-i-n diodes, insulated-gate bipolar transistors (IGBT), bipolar junction transistors (BJTs), etc., may be desired for, for instance, high-speed power switching applications.

This technology relates to high electron mobility transistors (HEMT). In conventional off-type HEMTs, a large amount of gate threshold voltage variation is often found. Transistors according to this technology include a p-type region, a barrier region, an insulation film, a gate electrode, and a channel region. The channel region is connected to an upper surface of the p-type region. The channel region is n-type or i-type and provided with a first channel region and a second channel region. The barrier region is forming a hetero-junction with an upper surface of the first channel region.

This technology provides an improved MOSFET structure for power switching applications. An n- GaN reduced surface field (RESURF) region is created using epitaxial growth and selective etching of an n- drift layer. This is followed by ion implantation to achieve n GaN contact regions for the source and drain. This avoids the difficulties in controlling doping levels, leakage current, and electron mobility when using ion implantation alone to achieve the two different doping zones.

Conventional laterla trench-based components, such as trench lateral transistors, typically have a substantial undesirable capacitance related to the overlap of gate and drain electrodes in the same trench. Particularly, many trench-type lateral transistors are fabricated with the gate and the drain formed in the same trench, typically separated by an oxide layer. The overlap of the gate and drain regions results in a parasitic gate-to-drain capacitance, which can damage frequency response.